module top_module( 
    input a, b,
    output out_and,
    output out_or,
    output out_xor,
    output out_nand,
    output out_nor,
    output out_xnor,
    output out_anotb
);

    wire	b0;
    
    and		and1	(out_and, a, b);
    or		or1		(out_or, a, b);
    xor		xor1	(out_xor, a, b);
    nand	nand1	(out_nand, a, b);
    nor		nor1	(out_nor, a, b);
    xnor	xnor1	(out_xnor, a, b);
    not		not1	(b0, b);
    and		and2	(out_anotb, a, b0);
    
endmodule
